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“Briefly and simply, assurance work makes a user or a creditor more confident that the system works as intended without flaws, without surprises, even in the presence of malice.” … “The major shortfall is absence of assurance or safety mechanisms in software. If my car crashed as often as my computer does, I’d be dead by now.”
Brian Snow, Former Technical Director of the US National Security Agency (NSA), "We need Assurance", AusCERT 2008 -
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"In the medium term, we need to be prepared for the eventuality that large quantum computers could be built: this would require an upgrade of most symmetric cryptographic algorithms and a completely new generation of public-key algorithms."
SecurIST, “D3.3 – ICT Security & Dependability Research beyond 2010: Final Strategy”, January 2007 -
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“Consider the use of smart cards ... for especially critical functions. Although more costly than software, when properly implemented the assurance gain is great. The form-factor is not as important as the existence of an isolated processor and address space for assured operations – an ‘Island of Security,’ if you will. Such devices can communicate with each other through secure protocols and provide a web of security connecting secure nodes located across a sea of insecurity in the global net.”
Brian Snow, Former Technical Director of the US National Security Agency (NSA), "We need assurance!", 1999-2008
Technologies Data privacy and integrity VEST cipher-hash
| Synaptic VEST cipher-hash Home |
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Reap the benefits of cryptography in your semiconductor application by significantly reducing your circuit area and power consumption costs of implementing data privacy and integrity operations by using VEST instead of software optimised cryptography! The patented VEST family of hardware cipher-hash functions is designed exclusively for efficient operation on 4-to-1 (and 6-to-1) LUT FPGA and standard cell ASIC architectures. The extensive use of bit-level addressing and different functions for each nonlinear bit updated in the cipher prevents efficient implementation in 8, 16 or 32-bit word based instruction sets found in general purpose processors. The VEST family of ciphers are designed to support data privacy, message authentication, and collision resistant hashing operations in the same module with over 90% logic reuse. Further information is accessible via the menu bar on the right of the screen under the VEST cipher-hash menu item. A few diagrams of VEST's structure are displayed below.  A diagram of the VEST phase 2.x structure when performing single-pass authenticated encryption.
 An abstract diagram of the patented 83-bit wide VEST-4 core accumulator round function. In the diagram above each of the output bits is the result of a unique nonlinear function supplied a unique set of 6 inputs drawn from the left of the bit. Each of the 83-bits is then permuted before being supplied back as input during the next round.
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| Last Updated on Thursday, 15 January 2009 19:50 |
