• "Today’s systems must anticipate future attacks. Any comprehensive system – whether for authenticated communications, secure data storage, or electronic commerce – is likely to remain in use for five years or more. It must be able to withstand the future: smarter attackers, more computational power, and greater incentives to subvert a widespread system. There won’t be time to upgrade it in the field."

    Bruce Schneier, "Why Cryptography Is Harder Than It Looks", 1997
    Read more...

  • "My colleagues at MIT and I have been building simple quantum computers and executing quantum algorithms since 1996, as have other scientists around the world. Quantum computers work as promised. If they can be scaled up, to thousands or tens of thousands of qubits from their current size of a dozen or so, watch out!”

    Prof Seth Lloyd of MIT, MIT Review 2008

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  • “Advances have often been done in steps, and beyond approximately 10 years into the future, the general feeling among ECRYPT partners is that recommendations made today should be assigned a rather small confidence level, perhaps in particular for asymmetric primitives.”

    European ECRYPT Network of Excellence, “Yearly Report on Algorithms and Key Lengths (2007-2008)", 2008

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Home Resources Synaptic publications Cryptographic white papers: VEST pub: 20 Gb/s VEST-32 on 110nm LSI Rapidchip (2006)
pub: 20 Gb/s VEST-32 on 110nm LSI Rapidchip (2006)
Wednesday, 01 February 2006 00:00
Authors:

Benjamin Gittins
Organisation:

Synaptic Laboratories Limited
Date:

February, 2006
Keywords: VEST, ASIC
Electronic Publication: Short Paper in PDF | Long Paper in PDF
Abstract:

This paper is a preliminary report on the static-timing, R-Cell, die-area and staticpower requirements of the complete data-path of VEST-32 ciphers on LSI Logic RapidChip 180ηm and 110ηm Technologies. Based on the conservative standard RapidChip design front-end sign-off process, VEST-32 can effortlessly satisfy a demand for 256-bit secure 10 Gb/s authenticated encryption @ 167 MHz on 180ηm LSI Logic RapidChip platform ASIC technologies in less than 45K Gates and zero SRAM. On the 110ηm Rapidchip technologies, VEST-32 offers 20 Gb/s authenticated encryption @ 320 MHz in less than 45 K gates. Similar bandwidth performance may be achievable with reduced circuit area using a custom sign-off process.
Quote:
See:
Citation:

Benjamin Gittins, "VEST-32, 256-bit secure, Single-Pass Authenticated Encryption, 20 Gigabit/s @ 312MHz on 110ηm LSI Logic RapidChip Platform ASIC Technology in <45K Gates, Zero SRAM and <150mW", Synaptic Laboratories Limited, February 2006
Related work:

pub: VEST, AES, SHA Hardware Performance Survey (2005)


Last Updated on Sunday, 23 October 2011 09:00